Technical Conference

October 6, 2010

13.30 – 15.00

Session 1: HARDWARE DESIGN

Chairman: Stéphane BOUDAUD, CSR

• 13.30: Ultra low power system-in-package module for Bluetooth Low Energy Applications: Pascal CIAIS, Chakib EL HASSANI, Jonathan MOLON (Insight SIP, Polytech' Nice Sophia / Insight SIP).
  Abstracts - Slides
  
  
• 14.00: Challenges in the Design of a Complex Mixed-Signal IC: Paolo Cusinato (Texas Instruments).
  Abstracts - Slides
  
  
• 14.30: Simulation of a 12 GHz Phase Locked Loop using Rotary Traveling Wave Voltage Controlled Oscillator: F. Ben Abdeljelil, W. Tatinian & G. Jacquemod, L. Carpineto (LEAT, SDRF).
  Abstracts - Slides

 

October 7, 2010

14.00 – 15.30

Session 2: ADVANCED DESIGN SOLUTIONS

Chairman: Michel COLLURA, Infineon

• 14.00: Initial Terminal Influence for Net Generation - A Current Density Aware Algorithm: J.M. Jonquères, J.M. Portal & O. Ginez, A. Ginetti & C. Nauts (IM2NP & Cadence).
  Abstracts - Slides
  
  
• 14.30: DRCPlus in a Router: Automatic Elimination of Lithography Hotspots using 2D Pattern Detection and Correction : Jie Yang, Norma Rodriguez, Olivier Omedes, Franck Gennari, Ya-Chieh Lai, Viral Mankad (Advanced Micro Devices & Cadence Design Systems).
  Abstracts - Slides
  
  
• 15.00: Transient-Error Tolerance and Adaptation to PVT Variations through Timing-Error Detection and Correction: Shidhartha Das (ARM).
  Abstracts - Slides

 

16.00 – 17.00

Session 3: ARCHITECTURE & METADATA

Chairman: Robert de SIMONE, INRIA

• 16.00: Partitioning of in-vehicle System-on-Chip: a Methodology based on DIPLODOCUS: Daniel Knorreck, Ludovic Apvrille, Renaud Pacalet (Institut Telecom, Telecom ParisTech, CNRS LTCI).
  Abstracts - Slides
  
  
• 16.30: Improving Pre Silicon validation using IP-XACT: Gregory Prieur, Patrick Gueriaud (ST-Ericsson).
  Abstracts - Slides