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October 12, 2011 – 13 : 00 – 15 : 00, Bell Amphi
LETI SESSION :
1. SOI fully depleted ultra thin Si ultrathin Sio2 with VT control
2. Power Management (digital designer point of view)
3. ultra wide band
Speakers :
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François ANDRIEU : FDSOI for low power apllications.
François Andrieu received the Ph.D. degree in physics and nanoelectronics from the National Polytechnic Institute, Grenoble, France, in 2005, respectively. In 2005, he joined the CEA-LETI, Minatec Campus, Grenoble, as a Research Engineer. His work is currently dedicated to planar fully depleted silicon-on-insulator complementary metal–oxide–semiconductor technology for the 20-nm node and below. He is a Senior Scientist with the French Observatory for Micro and Nanotechnologies, Grenoble. He has managed or been involved in several European projects (such as the MEDEA+ Silonis and Decisif ones) and industrial projects (joint programs with Soitec and STMicroelectronics/International Business Machines). He is the author or coauthor of 111 journal articles or conference abstracts, including six invited papers. He is a holder of four patents. Dr. Andrieu was a recipient of the Best Young Researcher Paper Award of the European Solid-State Device Research Conference in 2005.
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Julien ARCAMONE : Last advances on a Multi-Gas Micro Analyzer based on NEMS detectors.
Julien Arcamone after receiving his MSc in 2003 in materials engineering from INSA Lyon (France), worked at STMicroelectronics, Crolles (Grenoble, France), on Si/SiGe epitaxy. In 2004, he joined the National Center for Microelectronics (CNM-IMB-CSIC) of Barcelona (Spain) where he received a PhD in Electronic Engineering in 2007. He is now part of the permanent research staff of the Micro and Nanosystems group at CEA-LETI/MINATEC Campus, Grenoble (France) and is a member of the LETI/Caltech ‘Alliance for Nanosystems VLSI’. His research area involves the design, fabrication and characterization of MEMS and NEMS devices for advanced sensing and actuating applications (gas and inertial sensors, time references). He has also been working on the integration of nanomechanical devices with CMOS circuitry within several European projects. Dr. Arcamone has authored or co-authored more than 40 peer-reviewed scientific publications and is the co-inventor of three patents.
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Edith BEIGNE : GALS NoC adaptive architectures : when advanced technologies meet innovative architectures.
Edith Beigne received her master degree from Grenoble Institute of Technology in 1998. In 1998, she joined the CEA-LETI Laboratory, MINATEC campus, Grenoble, France. In 2001, she initiated the asynchronous logic design activity in cryptographic and contactless systems, then focusing on asynchronous networks-on-chip. From 2006 to 2008, she has been in charge of a power aware GALS SoC implementing dynamic and static low power techniques based on an asynchronous NoC. She is now working on variability issues and power-performance-yield improvement in advanced CMOS circuits.
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Dominique MORCHE : LORELEI : A Low-Power UWB Receiver with cm ranging precision.
Dominique Morche (IEEE Member) received the engineer diploma from the ENSERB (Ecole Nationale Supérieure d'Electricité et de Radioelectricité de Bordeaux) and the Ph.D degree in Electronics from the INPG (Institut National Polytechnique de Grenoble) in 1990 and 1994 respectively. His PhD mainly focuses on sigma-delta ADC. From 1994 to 2001 he was employed by France Telecom as a research engineer. He has been involved in architecture and design of analog circuits for telecom application. He's currently working at CEA-LETI. His current field of research is in the specification and design of RF architecture for UWB and low power systems. He’s a member of the scientific committee of ESSCIRC Conference, has published over 50 papers in various conferences and journals and hold 12 patents.
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Marc BELLEVILLE : CEA LETI brief introduction.
Marc Belleville (IEEE Senior Member) received the Ph.D. degree from the the Grenoble National Institute of Technology, Grenoble, France, in 1980. Since then, he has been involved in circuit design, spending the first six years in industrial companies. In 1985, he joined the CEALETI, Minatec Campus, Grenoble, and occupied several positions as a Team Leader. He is now a Research Director and a Chief Scientist with the Architecture, Integrated Circuit Design and Embedded Software Division. He is the author or coauthor of 18 patents and 50 international communications or publications. His research interests include the interactions between design and advanced technologies (e.g., silicon-on-insulator, heterogeneous, or 3D technologies)
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October 12, 2011 – 15 : 30 – 17 : 30, Bell Amphi
BERKELEY SESSION :
Designing Energy-Efficient Integrated Systems
Speakers :
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Elad ALON :
Elad ALON received the B.S., M.S., and Ph.D. degrees in Electrical Engineering from Stanford University in 2001, 2002, and 2006, respectively. In January 2007, he joined the University of California at Berkeley as an Assistant Professor of Electrical Engineering and Computer Sciences, where he is now a co-director of the Berkeley Wireless Research Center (BWRC). He has held positions at Sun Labs, Intel, AMD, Rambus, Hewlett Packard, and IBM Research, where he worked on digital, analog, and mixed-signal integrated circuits for computing, test and measurement, and high-speed communications. Dr. Alon received the IBM Faculty Award in 2008, the 2009 Hellman Family Faculty Fund Award, the 2010 UC Berkeley Electrical Engineering Outstanding Teaching Award, and the 2010 ISSCC Jack Raper Award for Outstanding Technology Directions Paper. His research focuses on energy-efficient integrated systems, including the circuit, device, communications, and optimization techniques used to design them.
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