Abdelmadjit
AZZIBER got surgery on Friday 6th. The surgery lasted for 6 hours.
Everything went fine. There will be no need for a second surgery.
Abdelmadjit is recovering within hiss French family.
If you want to know more about the case and about his, please visit
"rencontres africaines web site": http://site.voila.fr/rencontresafricaines,
click on the picture of Abdelmadjit.
Same charity
event (October, 2002)
Mr Presti
is the president off "Rencontres Africaines", the association which
organises the surgical intervention of Abdel Wadjit. Abdel was at
the hospital yesteray for his last visit before the surgery. Everything
is going fine. Abdel is ready for the surgery. He is happy with his
French family. He is doing some progress in French.
In difficult surgery like this one, The Lenval hospital policy is
to communicate with the press only when the difficulties are behind.
This is why you do not hear sofar about this event in the local press.
Mr Presti proposed to organise a greeting ceremony with the event
sponsors and the press in the presence of Abdel after the surgery.
You will find attached a picture of Abdel arriving at Nice airport
and meeting with his hosting famlily Mr and Mme Flory. Abdel is the
tallest boy between Mr and Mme Flory, the youngest one in the front
received the same surgery as Abdel one year ago and is back for a
checkup.
TNI-Valiosys
Supports Sugar as part of its imPROVE-HDL Formal Property Checking
Environment.
TNI-Valiosys, the system design and formal verification solutions
provider, announces its support of Sugar 2.0 as part of the company's
imPROVE-HDL formal property checking environment. Hardware designers
and verification engineers can now use Sugar to describe properties
of complex SOC interface protocols to be formally checked against
their VHDL/Verilog RTL IP blocks using TNI-Valiosys' model checker,
imPROVE-HDL.
imPROVE-HDL is a model-checking tool that uses formal methods to quickly
and exhaustively verify properties on VHDL/Verilog RTL models. imPROVE-HDL
has been successfully used by customers on a number of complex SOC
designs, formally checking the functional behavior bus interface controllers
against specification. The protocol temporal relationships are captured
using Sugar as assertions to be formally checked against the IP's
functional behavior. Environment constraints will be described using
imPROVE-HDL's native property and environment constraint capture mechanism,
called PEC. Support for Sugar will be extended to include environment
constraint expression at a future date at customers requests.
About TNI-Valiosys : TNI-Valiosys provides a rich set of EDA formal
verification and system design solutions targeted at System-on-Chip
(SOC) developments by semiconductor companies and IP providers. For
designs involving complex SOC bus, memory or peripherals controllers,
designers can use a formal model checker (imPROVE-HDL) to exhaustively
debug their specifications and RTL models in complement of simulation.
For designs involving full-custom blocks, designers can use an abstraction
tool (TLL) to abstract the transistor-level circuits into equivalent
gate-level models for faster functional verification. VHDL/Verilog
to SystemC2.0 translators are also available.
Philips
Semiconductors Sophia develops complex silicon systems for telecommunications
and networking.
Our key competences are concentrated on the following areas:
* Cellular baseband technology
* GSM, GPRS, EDGE and 3G * Bluetooth baseband and RF technology,
* Cellular Infrastructure and basestation development
* Multimedia Platform Development
* About 300 persons work on-site on various domains such as research
& development, marketing and other support activities (Quality, HR,
Finance,...).
* With about 15 nationalities on-site, the Sophia site has a multicultural
population. < br> * Philips Semiconductors in the Sophia Antipolis
area:
* Philips Semiconductors Sophia participates to various associations
promoting synergy locally through its involvement in associations
such as Telecom Valley or the club HiTech. We are also working closely
with ETSI (European Telecommunications Standards Institute) and local
schools and universities: Eurecom, Esinsa, Essi, Ceram.
* About Philips Semiconductors in the world: * Philips Semiconductors,
headquartered in Eindhoven, The Netherlands, employs over 33,000 employees
in more than 50 countries. With sales of around $4.4 billion in 2001,
Philips Semiconductors is one of the world's top semiconductor suppliers.
We are a leader in complex silicon systems for consumer electronics,
telecommunications, automotive, computer peripherals and networking.
Additionally, we are a volume manufacturer of semiconductors for multi-market
products.
Cadence
Sophia-Antipolis is diversifying its activities into the analog and
full custom World.
After the successful release of its first product in the area of Synthesis,
placement and routing, the Cadence Sophia development center will
be investing its resources in the development of full custom and mixed-signal
physical implementation tools.
This new project is in addition to our continuing effort in synthesis,
placement and routing of digital circuit. This new project is a logical
extension of the evolution in technology towards "systems on a chip
integrating digital and analog blocks.
Cadence Sophia-Antipolis has a staff of 60 engineers, the majority
being software developers working with product validation and application
engineers.
The site at Sophia has strengthened its expertise in the new Open
Access data base "Genesis" (http://www.si2.org/Projects/openaccess.htm)
to be in a position where it is able to support the deployment of
the open access program for its European members.
For more information on the Cadence Sophia site, or about the Open
Access program, please contact Jacques-Olivier Piednoir (jop@cadence.com).
High-end
wireless LAN systems developed in Sophia-Antipolis
NewLogic has announced its WILD (Wireless LAN IP for LSI Designs)
products to add IEEE 802.11a or 802.11b functionality to its customers'
ASICs (see http://www.newlogic.com).
These products are developed and supported by the French office of
NewLogic, based in Sophia Antipolis. This team, focussed on wireless
product development, has proved its expertise and efficiency with
its highly successful BOOST Bluetooth IP products.
Since 1999, the software and hardware design teams have worked together
to define optimal architectures and implementations of complete wireless
communication systems.
The team has been strengthened by the addition of several signal processing
experts, who focus on the implementation of the 802.11 physical layer.
"The new product line really takes advantage of this powerful combination
of talents from very different domains. This is shown by the impressive
performance of the system", declared Gianmaria Mazzucchelli, director
of the Sophia office.
"NewLogic has established itself as one of the world's leading providers
of intellectual property and design services for secure and wireless
communication technology", said Hans-Peter Metzler, President and
CEO. "We continue to expand our operations in both France and Austria
while attracting top talents from around the world. New purpose-built
labs in Lustenau and in France have been recently commissioned to
keep up with our growth", he added.
